Isolation cell placement#
- Power domains in the design has been designed in such a way that whenever it is required it gets switched on otherwise it is switched off. To control this behavior, we need isolation cells.
- Isolation cells are physical only cells which are placed at the interface between the power domain area which are shut down and always on.
- Isolation cells are present in the Gate level Netlist and are placed in the design once PG grid connection happens.
- Isolation cells are sitting near ports in always on domain and they control the power domains from there.
Type of Isolation Cells#
- There are two types of Isolation cells:
- Retain 0
- Retain 1
Verify DRC
We verify DRC after the Isolation cell placement to look for PG rail connectivity, Geometry checks, Metal short, etc. We must fix these DRCs before going for the STD cell Placement. In many companies, DRC is checked after P&R but if we verify DRC and fix after floorplan stage itself, then it is good for our design to not have many surprises during sign-off. It is recommended to clean Floorplan related DRC just after floorplan stage.
Written by
Swasti Pujari
Associate Director, Backend Engineering at CoreIC Technologies, with 15+ years in VLSI Physical Design and backend engineering. Previously Practice Head at UST Global, leading Physical Design, STA, EMIR, DFT, and Physical Verification. Delivered 3nm, 6nm and 7nm projects for AMD, Intel, and Microchip, and published IEEE research on hybrid AI-EDA floorplanning.
