What are Macros?#
Macro Cells are the Memory cells. These IPs have been designed by some other Analog design team, which can be used in the floor plan stage of the design.
Type of Macros#
There are following three types of Macros:
Hard Macros
Hard macros are defined in LEF or GDS|| files. Hard macro always comes in terms of hardware IPs, e.g. Memory. Hard macros are very similar to block level design, which is optimized for PPA (Power, Performance, Area) and are already silicon tested. While placing hard macros, we can only move, rotate, flip but we can’t change anything inside it.
2. Firm Macros
Firm Macros are defined in Netlist. These are rather more flexible and portable than the hard macros. Sometimes depending on the requirement, we can optimize these macros for PPA.
3. Soft Macros
Soft Macros are defined in Synthesizable RTL. RTL doesn’t depend on any technology, so these macros are also not specific to any manufacturing process. Hence, we can edit before going to later stages, that means soft macros are more flexible than hard and firm macros.
Written by
Swasti Pujari
Associate Director, Backend Engineering at CoreIC Technologies, with 15+ years in VLSI Physical Design and backend engineering. Previously Practice Head at UST Global, leading Physical Design, STA, EMIR, DFT, and Physical Verification. Delivered 3nm, 6nm and 7nm projects for AMD, Intel, and Microchip, and published IEEE research on hybrid AI-EDA floorplanning.
