Tap Cell Placement in VLSI

Tap Cell Placement:

• Well Tap cells are physical only cells which are placed in the design to avoid latch-up condition and maintain VDD and VSS NWELL continuity.

Latch-up condition:

Latch-up basically means a short circuit condition between power and ground. Due to this short circuit condition, a low impedance path is created. So in order to limit this resistance between power and ground connections to wells of the substrate, Tap cells are used.

• Tap cells are technology dependent and these cells are used so that PWR and GND are connected to substrate and NWELL respectively.
• Well tap cells should be placed before the PG grid insertion in the design based on pitch, width and offset in a column pattern.