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Macro Placement Guidelines

The macro placement guidelines are very important factors to place the macros inside the core. By following these guidelines you will be able to place the macros efficiently.

  • Floorplan
  • Physical Design
On this page 5 sections
  1. Macro Placement Guidelines
  2. Formula for Macro Spacing
  3. Key Macro Placement Guidelines
  4. Pre-Placement Check: Fly Lines Analysis
  5. Conclusion

Macro Placement Guidelines#

After pin placement, the next crucial step in physical design is macro placement. Proper macro placement ensures optimal routing, reduces congestion, and improves timing. Below are essential guidelines for macro placement that, if followed carefully, can help in handling complex blocks with ease.

Figure 1. Macro Placement Guidelines in Physical Design VLSI

Formula for Macro Spacing#

Before placing macros, you can use the following formula to determine the required spacing between them:

๐Ÿ“Œ Distance between macros = (No. of Pins * pitch * 2) / Available Metal Layers

Key Macro Placement Guidelines#

  1. Place macros at the periphery of the block.
    • This ensures better routing access and reduces congestion inside the core.
  2. Logically related macros should be placed close to each other.
    • This is known as logical grouping and minimizes long interconnect delays.
  3. Optimize channel width to avoid crisscross macro placement.
    • Placement should align with track multiples to facilitate easier routing.
  4. Avoid placing macros or stacks near the ports.
    • This prevents routing congestion in later physical design stages.
  5. Macro pins should face the core to reduce detours.
    • This minimizes routing complexity and improves performance.
  6. Use a rectangular placement approach.
    • Avoid irregular macro shapes to prevent area wastage.
  7. Create halos (keep-out zones) around macros.
    • This helps to reduce congestion in surrounding areas.
  8. Use hard or partial blockages in gaps between macros.
    • Prevents standard cells from being placed in congested areas.
  9. Avoid notches in macro placement.
    • Ensures smooth routing and avoids unnecessary dead space.
  10. Maintain minimum gaps between macros.
    • Helps in heat dissipation and avoids electromagnetic interference (EMI).
  11. Allow routing channels for buffer insertion.
    • This helps in timing optimization and reduces congestion.
  12. Ensure macros are placed within their respective power domain fences.
    • Helps in power integrity and isolation.

Pre-Placement Check: Fly Lines Analysis#

๐Ÿ” Before placing macros, analyze the fly lines.

  • Fly lines provide a visual representation of connectivity, guiding optimal macro placement.
  • Helps in reducing routing detours and improving overall connectivity.

Conclusion#

Macro placement is a critical step in physical design. By following these guidelines, you can achieve optimized routing, reduced congestion, and better performance for complex blocks. A well-placed macro setup ensures a smooth physical design flow while reducing iterations at later stages. ๐Ÿš€

Written by

Swasti Pujari

Associate Director, Backend Engineering at CoreIC Technologies, with 15+ years in VLSI Physical Design and backend engineering. Previously Practice Head at UST Global, leading Physical Design, STA, EMIR, DFT, and Physical Verification. Delivered 3nm, 6nm and 7nm projects for AMD, Intel, and Microchip, and published IEEE research on hybrid AI-EDA floorplanning.