The total shipment of semiconductors this year is expected to exceed the 1 trillion mark. This includes transportation of ICs and optoelectronics, sensors/actuators and discrete (O-S-D) devices.
What are VIAs in VLSI? To connect between different metal layers, we need poly layer along with the metal layers that we are going to connect. These are basically called as VIAs. From the below picture we can see that…
Pitch The distance between the center to center of the metal is called as pitch. In the below picture, B is pitch. Spacing Spacing is the distance between the edge to edge metal layers. The distance A is spacing in…
Power We will discuss more about power analysis in ECO section while working on PDN, for now let’s take basic glimpse of the power analysis and consumption. There are basically 2 types of power consumption in VLSI design: 1. Dynamic…
What is Congestion? If the number of required routing resources are more than the number of available routing tracks, then the area becomes congested. High congestion causes detours and leads to worse results. Congestion makes the design non-routable that means…
What is Placement? Once we are done with the floorplan after placing all the physical cells inside the core boundary, we are left with standard cells which are still sitting out of the core design area. Now we need to…
Pin Placement Pin Placement details basically come from the TOP level design where we are having information to place pins according to the interaction with other HMs. We need to define edge, layer and location before placing pins. After pin…
What is Boundary Cap (End Cap) ? Boundary cap cells are physical only cells. These cells are placed at the periphery of the core and power domain. Boundary cap cells are placed just after macro placement in the floorplan flow.…